Highly Sensitive CMOS-Based Current Readout for Nanopore Sensing

This dissertation presents the design, implementation, and experimental validation of an ultra-low-noise continuous-time CMOS current readout system for nanopore-based single-molecule sensing. The work addresses the fundamental challenge of simultaneously achieving sub-femtoampere noise resolution, wide DC dynamic range, and reset-free continuous operation within a fully monolithic standard CMOS implementation — a combination that existing transimpedance amplifier (TIA) architectures cannot jointly satisfy due to inherent trade-offs between feedback element noise, signal dynamic range, and circuit complexity. The first contribution is a novel TIA topology in which the intrinsic drain–bulk PN junction of a MOSFET is exploited as the feedback element by deliberately suppressing channel conduction through appropriate gate biasing. Under this operating condition, both flicker noise and channel thermal noise are eliminated at the device level; the residual noise of the feedback element is governed solely by junction shot noise, which at pA-level bias currents is equivalent to the thermal noise of a passive GΩ–TΩ resistor. The TIA core employs complementary anti-parallel PN junction pairs for bipolar operation, a ratiometric current amplifier for linearisation of the nonlinear junction impedance, and pole-zero compensation for independent bandwidth control. The second contribution is a DC-compensated readout architecture that augments the TIA core with a dedicated DC-servo feedback loop. The loop continuously diverts the large open-pore baseline current — inherent to nanopore sensing — away from the TIA signal path, decoupling the DC operating point from the AC signal chain and restoring near-ideal low-noise conditions regardless of the baseline magnitude. This architecture enables a DC dynamic range of ±50 nA to be accommodated simultaneously with sub-pA AC resolution, without periodic reset or operator intervention. Both architectures are implemented as a dual-channel monolithic ASIC in 0.35 μm X-Fab CMOS and validated on a dedicated PCB-based readout platform. Experimental characterisation of the fabricated circuit demonstrates an input-referred noise density of 1.5 fA/√Hz and integrated noise of 240 fA over 10 kHz, 2.6 pA over 100 kHz, and 38.2 pA over 1 MHz, confirming theoretical noise predictions and shot-noise-dominated operation. Measurements with a solid-state SiNx nanopore device, conducted at the Keyser Lab, University of Cambridge, demonstrate continuous single-molecule λ-DNA translocation detection under biologically relevant conditions, validating the complete sensing platform from nanopore chip to digital output.