Development and Applications of a SystemC-AMS Virtual Testing Framework for Industrial Automatic Test Solutions

This dissertation presents a methodology based on SystemC-AMS and supported by the COSIDE graphical design environment for the development of automatic test solutions for industrial electronic devices. The proposed approach optimises the design of test hardware and the development of test programs by allowing efficient capture of test hardware schematics and rapid mixed-signal simulation of test program sections. This offers detailed insight into the behaviour of the test setup and into the mutual interactions between test hardware, automatic test equipment, and device under test, enabling comprehensive pre-silicon troubleshooting of the test solution. The development of the framework from the ground-up is presented in detail, emphasising the selection of appropriate software and programming methodologies, along with the modelling principles for automatic test equipment resources and electronic components for test hardware development. The validity of the proposed methodology is demonstrated through its application in two innovative industrial test scenarios. In the first case study, the framework is employed in the design of the probe-card for the wafer-level testing of an innovative industrial gate driver with built-in over-current protection. The adoption of the framework enables the investigation of several critical aspects of the test hardware, including schematic robustness, analog and digital signal integrity, measurement solutions for key electrical quantities, and the generation of a variable-amplitude current pulse in which active components modulate the native automatic test equipment capabilities. A comparison between simulation results and bench measurements performed during test program execution on the fabricated probe-card demonstrates the capability of the framework to provide an effective representation of the modelled components and to properly support the development of automatic test solutions. In the second case study, a test concept to enable the measurement of the high level output peak current of isolated gate drivers is developed from the initial concept to the physical implementation. Alternative circuit topologies and component dimensioning are evaluated within the framework and subsequently validated through measurements performed on the manufactured hardware. A final sequence of qualification measurements is performed to finalise the test concept and confirm its suitability for integration into future standard automatic test solutions.